Overview & Objective
The objective of this project was to implement a classic arcade game entirely in hardware without the use of a soft-core microprocessor, relying strictly on RTL design and custom VGA timing controllers. The system operates entirely in hardware with zero software runtime overhead, managing frame buffering, game state progression, collision detection, and peripheral control at the register-transfer level.
Technical Implementation
VGA Display Pipeline
Designed a pixel timing controller that generates standard 640x480 @ 60 Hz VGA signals using custom horizontal and vertical sync counters driven by a derived 25 MHz pixel clock.
Memory & Rendering Interface
Leveraged Xilinx Block RAM (BRAM) dual-port memory to store the snake's body coordinates and grid matrix, allowing parallel read/write cycles to avoid pipeline stalls during rendering.
Deterministic Game Engine (FSM)
Structured game logic around a synchronous Finite State Machine controlling states across Start, Play, Pause, and Game Over. Collision checking (wall impacts, self-collisions) and pseudo-random fruit generation execute in single-cycle evaluations.
Peripheral & I/O Interfacing
Multiplexed on-board pushbuttons with debounce circuits for directional control, integrated seven-segment display drivers to report live score counts, and utilized onboard switches to toggle game speeds and difficulty levels.
Challenges & Problem Solving
VGA Timing Synchronization
Initially, the VGA display suffered from tearing and visual artifacts because the game state was updating mid-frame. I solved this by synchronizing the game's finite state machine (FSM) to the vertical blanking interval (V-Sync) of the VGA controller, ensuring the BRAM was only read while the electron beam was resetting.
Hardware Debouncing
Mechanical bounce from the Nexys 4 pushbuttons caused single presses to register as multiple inputs, leading to instant self-collision. I designed a digital debounce circuit using a shift register and a slow clock divider to sample the inputs, resulting in clean, single-cycle directional triggers.
Results & Future Improvements
Results
Delivered a fully functional, artifact-free game running at a rock-solid 60 FPS in standard 640×480 resolution, utilizing minimal logic gates and BRAM resources on the Artix-7.
Future Improvements
I plan to replace the onboard pushbuttons with a PS/2 keyboard interface for a more authentic arcade experience, and route an I2S audio controller to output sound effects for eating fruit and game-over states.